DS-3 ATM Physical Interface

For information on testing DS3 links  

The DS-3 interface operates at 44.736 Mbps over coax cables, compliant with ATM Forum UNI specifications. It supports both PLCP and direct cell mapping and complies with the C-bit/M23 standards. The interface has BNC connectors.

There are three standards for DS-3 framing: M23, C-bit parity and SYNTRAN. C-bit parity is one block of data not muxed which uses C-bits for purposes other than dibble stuffing. M23 multiplex scheme provides for transmission of seven DS-2 channels. Since each DS-2 channel can contain 4 DS-1 signals, a total of 28 DS-1 signals (670 DS-0 signals) are transported in a DS-3 facility. The existing DS-3 signal format is a result of a multi-step, partially synchronous, partially asynchronous multiplexing sequence.

The DS-3 signal is partitioned into M-frames of 4,760 bits each. The M-frames are divided into 7 M-subframes each containing 680 bits. Each subframe is further divided into eight blocks of 85 bits each, with the first bit used for control and the rest for payload. There are 56 frame overhead bits which handle such functions as M-frame alignment, M-subframe alignment, performance monitoring, alarm and source application channels.

Following is an illustration of the DS-3 M-frame. The time length of the frame is 106.402 microseconds, thus making the net transmission rate 5.720 Mbits/sec.

C-bit
The first C-bit in the M-frame is used to identify the type of framing used where 100=SYNTRAN, 111=C-bit and any other value represents M23. Remaining C-bits are used for dibble stuffing or C-bit frame applications.

M-bits
Multi-frame alignment bits are located in the fifth, sixth, and seventh subframes. M1=0, M2=1 and M3=0.

X-bits
Occupy the bit positions at the beginning of the first and second subframes. They are used for alarm functions and must be identical (00 or 11) within any M-frame. They can be used for low frequency signalling but cannot be changed more than once every second. When not used, X-bits should be set to 11; inserting a 01 or 10 can cause framing errors.

P-bits
The bit position at the beginning of the third and fourth subframes contains parity information. These 2 bits give the even parity. Valid values are 11 or 00.

F-bits
Frame alignment signal identifies all control bit positions within one M-subframe. F1=1, F2=0, F3=0 and F4=1.

C-Bit Framing

DS-3 C-bit parity format was advanced by AT&T to increase far-end performance monitoring. In this format, because stuff bits are used at every opportunity, C-bits can be used for purposes other than denoting the presence of stuff bits, including:

• Far End Alarm and Control signal (FEAC). In this case, C-bits are used to send alarm or status information from far end terminals to near end terminals and to initiate DS-3 and DS-1 remote loops. This is a repeating 16-bit word consisting of 0xxxxxx0 11111111. When no code is being transmitted, all 1’s are transmitted. The code is transmitted for 10 times or the alarm state length, which ever is longer.
• Not used.
• DS-3 path parity information.
• Far end block errors.
• Terminal to terminal path maintenance data link (LAPD, subset of Q.921).

Direct Mapping

When direct mapping framing mode is used, cell delineation is used to locate the cell boundaries. Cell delineation is the process of framing to ATM cell boundaries using the header error checksum (HEC) field found in the ATM cell header. The HEC is a CRC-8 calculation over the first 4 bytes of the ATM cell header. When performing delineation, correct HEC calculations are assumed to indicate cell boundaries.

An initial bit by bit search is made for a correct HEC sequence (HUNT state). Once located, the particular cell boundary is noted (PRESYNC state) and the search continues to determine whether the following pattern is correct. Once no incorrect HEC is received within a set number of cells, the SYNC state is declared. In this state, synchronization is not relinquished until a set number of consecutive incorrect HEC patterns are received.

PLCP

The DS-3 PLCP frame provides the transmission of 12 ATM cells every 125 µsec; thus, the net transmission rate is 4.608 Mbytes/sec. The PLCP frame is nibble aligned to the overhead bits in the DS-3 frame. A trailer is inserted at the end of each PLCP frame. The number of nibbles, 13 or 14, is varied continuously so that the resulting PLCP frame rate can be locked to an 8 KHz reference.

A-bits
Framing pattern octets; A1=F6, A2=28 hex.

P-bits
Path overhead identifier octets.

C1
Pad bit counter.

M-bits
SIP layer 1 management information. If M2 contains a Type=1 field then M1 contains a Type=0 field and vice versa.

G1
PLCP path status.
Bits 1-4: FEBE code (up to 8 possible errors).
Bit 5: Yellow alarm. If there is an active high PLCP path layer failure condition (PLCP loss of frame) for 2.5 seconds, a yellow alarm results. When failure ends for 15 seconds, the yellow alarm status is removed.
Bits 6-8: Link status signal as follows:

LLS Code LLS Name Link Status

B1
Bip-8 error. Computed over a 12x54 octet structure consisting of the Path Overhead and ATM cell. The G1 byte provides the error count of the previous frames last frame.

F1
PLCP path user channel.

Z-bits
For future use.